Draft for preliminary discussion.  Goal is to develop
checklist and documentation.  Timeframe is open.


Original draft: Lynne Green, Sept 2009


1) Touchstone Parser passes
	Header correct
	Number of entries at each frequency
	Sij = Sji ? within noise limits

2) Data Checks
	Passive and causal
	Sij = Sji ? within noise limits
	Reasonable noise limits
	Enough data points near each resonance
	Port mapping to physical component or structure
	Special checks for 2-port, mixed mode, and differential

3) Simulation with AC source and resistive terminations
	Runs in one IBIS simulator
	Correct DC operating point
	Overall correctness in frequency domain (check resonances)
	Correct step response and ramp response in time domain
3b) Repeat with a reactive load?

4) Comparison of both frequency and time domain simulation to bench test data

5) Other?